Cerebras Deploys Trillion-Parameter AI Models

Lots of folks here say Cerebras serves outdated models. Here’s my view: lets assume the above is true and the average serve with a delay of 6-9 months. Given that, its fair to expect them to start serving DS flash v4, glm 5.3, mimo 2.6 pro or kimi 3.1 pro in a matter of months. DS flash is already fast to the point I’ve became a bottleneck. But my point is: Cerebras should soon release better models that are not that far from frontier ones, at a fraction of cost and with multiples of the speed. Just be patient and plan for the future.

From my testing, the problem Cerebras has is they need to give people a taste to get new customers in, but since it requires so much hardware to get that speed and they don't have OpenAI-type money (< $3 billion compared to over $100 billion) and it's just incredibly hard regardless to manufacture that many of these types of crazy giant wafer nodes, there is just no way for them to keep up with the demand. So what they do is they have these cheap plans that let anyone get a little taste of the incredible speed, but they aren't reliable at all, because they have to share limited resources dedicated to sales. I believe that is really the main purpose of like the $50/month or whatever plans -- part of the sales funnel. The cheap plans compete directly with resources they need for their "real" paying enterprise customers. The "real" plans start at like $1500 per month, and I assume those have reasonable service level reliability. But actually I believe those $1500/month plans are totally worth it for some applications.

Cerebras is good on paper but all I can reasonably access is "GPT OSS 120b, Qwen 3.8 27B" which aren't very good for my use. Openrouter on nitro gets me there. Although the TPS is 5X less still. I have tried GPT OSS 120b on cerebras and it flies. But it's mostly wrong.

Ah, this prompted a few questions from me. Perhaps someone with more hardware background could chime in. They don't really show it here, but supposedly a Cerebras' chip is sub-divided into a 2D mesh of what they call PEs (cores). So data flow generally flows in two axis, and maintains consistent timings to its 4 neighboring cores. They show the layers flowing from left-to-right being streamed by PEs, but I wonder how true that ends up being: maybe the communications are easier to stream via diagonals, or some other shape that has better topology for data flow. Then, even from die shots of CPUs and GPUs we often see that cores are tiled as squares, and those don't have the same cross-core connection and streaming requirement. Now, I assume that some parts of what we call a core can be moved around more freely while maintaining whatever power/heating/timing requirements we have, so perhaps it's easier to 'force' a square by moving those loose parts around. But why do we confine those to squares? Is super-core layout just something not worth investing time into, like how interconnects are timed, non-convex tilings, and distances to I/O? And for streaming architectures like Cerebras, why aren't other types of tilings considered, something like a hexagon grid? This could have 3 inputs / 3 outputs, which could allow more complex data flow (?). Similarly, we could have 8 connections with longer diagonals in a square tiling, etc. I guess, what are the tradeoffs in place such that so many chip designs seem to reuse square tilings both locally and globally?

Having dealt with them professionally my view is they’re a company with truly remarkable technology and a bafflingly inadequate team. They need to hire better. Almost stopped me using their stuff wholesale. Groq are somehow worse.